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[Other resource] ref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776642 | Author: 张涛 | Hits:

[Other resource] ddr_verilog_xilinx

Description: DDR（双速率）SDRAM控制器参考设计，xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
Platform: | Size: 131327 | Author: 陈旭 | Hits:

[Other resource] rd1014

Description: SDRAM控制器,对SDRAM进行页写和对SDRAM进行页读的快速读写。是一个很好的SDRAM控制器-SDRAM controller, SDRAM to write for pages and pages of SDRAM for fast reading literacy. It is a very good SDRAM Controller
Platform: | Size: 10548 | Author: 陈长佳 | Hits:

[Other resource] sdram_control_burst

Description: 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
Platform: | Size: 154126 | Author: 梁文锋 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: Verilog HDL 语言构建SDRAM 控制器的详细方案设计-SDRAM controller Verilog HDL language construct detailed program design
Platform: | Size: 9984000 | Author: 刘明来 | Hits:

[Other] DDR-SDRAM

Description: DDR SDRAM控制器的FPGA实现-DDR SDRAM Controller with FPGA
Platform: | Size: 249856 | Author: pzf | Hits:

[VHDL-FPGA-Verilog] DDR3-SDRAM-Controller

Description: DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
Platform: | Size: 242688 | Author: 杨凯 | Hits:

[Other] SDRAM

Description: SDRAM controller: it contains a SDRAM controller writtern in verilog language. It is a interface between microprocessor and SDRAM device.
Platform: | Size: 7168 | Author: william | Hits:

[Software Engineering] DDR3-SDRAM-controller

Description: My package named design DDR3 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory.
Platform: | Size: 6144 | Author: thuanbk | Hits:

[Software Engineering] SDRAM-Controller-Core-n2cpu_nii51005

Description: 关于sdram的fdp文档，希望对你学习有用-about sdram fdp file，hope will help you
Platform: | Size: 178176 | Author: 欧拉拉 | Hits:

[Other] SDRAM

Description: SDRAM控制器的VHDL语言描述及仿真-SDRAM controller
Platform: | Size: 1600512 | Author: 朱亮 | Hits:

[ComboBox] SDRAM-control

Description: 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
Platform: | Size: 27648 | Author: albert | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 使用VHDL语言编写的对SDRAM进行读写操作控制器及其简单的测试层序。(VHDL language used to read and write operations controller SDRAM and its simple test sequence.)
Platform: | Size: 26998784 | Author: Devil0823 | Hits:

[Embeded-SCM Develop] DDR_MO

Description: 使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
Platform: | Size: 1101824 | Author: 搬砖123 | Hits:

[Other] SDRAM_ctrl

Description: sdram controller in vhdl
Platform: | Size: 1024 | Author: jwiggams | Hits:

[VHDL-FPGA-Verilog] 标准SDR SDRAM控制器参考设计，Lattice提供

Description: 说明： SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Description: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)
Platform: | Size: 17408 | Author: modelsim | Hits:

[VHDL-FPGA-Verilog] sdram_control

Description: SDRAM控制器 带仿真模型文件 仿真通过(Simulation model file simulation through SDRAM controller)
Platform: | Size: 2828288 | Author: Deanxiao | Hits:

[VHDL-FPGA-Verilog] my_sdram_mdl

Description: 此功能为altera fpga 的sdram 控制器，串口接收与发送(This feature altera fpga sdram controller, serial port to receive and send)
Platform: | Size: 1206272 | Author: flyhouse112 | Hits:

[VHDL-FPGA-Verilog] 友晶Sdram_Control_4Port

Description: sdram控制器，基础资料以及常用芯片手册(some article about sdram controller, basic datasheet)
Platform: | Size: 17408 | Author: sanjn | Hits:

[Other] sdram_uart

Description: sdram控制器的设计，包括 ：初始化、刷新模块、读写模块、命令解析模型的编写，通多串口发送接收数据验证设计的正确性(The design of SDRAM controller includes initialization, refresh module, read and write module, command parsing model, and the correctness of data verification design by sending and receiving data through multiple serial ports)
Platform: | Size: 25216000 | Author: 侯小明 | Hits:
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